Hardware architectures for real-time video processing and view synthesis

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Today, we consume video content on a variety of display devices. However, the resulting variety of display formats and standards conflicts with the rigid video acquisition process. Quality video content acquisition is expensive, both financially and technically, and is therefore typically produced for a very specific display format. The objective of this thesis is to close the gap between fixedformat content acquisition and variable-format content display using spatially-varying warping and smart acquisition. An algorithmarchitecture co-design approach is used to come up with efficient algorithms and hardware architectures targeted for real-time integrated systems. Low-level video analysis and computer vision, the solving of large sparse linear systems, and spatially-varying warping are the three investigated areas, followed by detailled discussions on resulting real-time circuits and systems.