Immunorepairing of hardware systems

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On-site repairing of a hardware system that operates in an extreme and inaccessible environment, such as a hardware module of a spaceborne or underwater device, is very costly or even sometimes impossible. That is the reason why, techniques for the design of a hardware system which is able to recover from a failure autonomously are necessary. Such self-repairing hardware system is composed basically of a fault recognition module, a recovery procedure module, and the circuit to be repaired. For the design of the fault recognition module, a low fault recognition latency is a requirement, so that such module can operate online and concurrently to the operation of the circuit to be repaired. In the literature there are many approaches of self-repairing systems, however, most of them do not deliver details of the design of a fault recognition module which is able to work concurrently to the operation of the circuit to be repaired. Moreover, many of the existing approaches propose new non-commercial hardware platforms or self-repairing procedures which are hard to reproduce. Hence, this thesis evaluates a set of fault recognition techniques that focus on reducing the fault recognition latency and hardware overhead and delivers a modular framework for the implementation of a self-repairing hardware system. Some of the evaluated techniques are taken from the field of artificial immune systems. ; eng