Y. Lavanya Books

The book details the design of a secure double integrity check system utilizing hybrid storage class memories to enhance chip density and reduce size. It introduces an SCM array and a migration handler to manage non-volatile and dynamic random access memories. A memory controller bank oversees data management, while a double integrity controller ensures data integrity during read and write operations. The implementation demonstrates that hybrid SCM effectively reduces operational delays, showcasing advancements in memory technology. Key concepts include RAM, SCM, DRAM, and NVM.

Este projeto apresenta o design de um sistema seguro de dupla verificação de integridade, utilizando memórias híbridas de classe de armazenamento. O sistema integra memórias não voláteis e dinâmicas, controladas por um banco de memória, visando reduzir o atraso de processamento. Palavras-chave incluem RAM, NVM, DRAM, W-SCM e R-SCM.